Semiconductor integrated circuits, particularly integrated circuits using MOS transistors, have increasingly been highly integrated. MOS transistors in integrated circuits have been downsized to nano sizes as the integration level is increased. As MOS transistors become smaller, problems occur such as difficulty in controlling the leak current and difficulty in reducing the area occupied by the circuits while assuring a necessary current quantity. In order to resolve these problems, surrounding gate transistors (SGT) have been proposed in which the source, gate, and drain are provided on a substrate in the vertical direction and the gate surrounds a columnar semiconductor layer (for example, see Unexamined Japanese Patent Application KOKAI Publication No. H2-71556)
In an SGT, a channel region is formed in the side surface of a columnar semiconductor layer to surround the columnar semiconductor layer. Therefore, it is possible to attain a large width of the gate in a small occupied area. In order for an SGT having this structure to operate, it is necessary for a large ON current to flow in a small occupied area. However, because it is difficult to apply a voltage on the source and drain in accordance with the desired current when the source and drain have high resistance, the desired current cannot flow. Therefore, a method of producing an SGT in which the source and drain are designed to have low resistance is necessary. Furthermore, it is also necessary to reduce the resistance of contacts in order for a large ON current to flow in the small occupied area.
In the SGT, the columnar semiconductor layer needs to have a small diameter in order to diminish leak current accompanying downsizing.
When the columnar semiconductor layer has a small diameter, the diameter of the columnar semiconductor layer is smaller than that of the contact layer formed on the columnar semiconductor layer. In this case, if over-etching occurs during forming contact holes by etching in the step of forming a contact layer on the columnar semiconductor layer, short circuits between the contact layer on the columnar semiconductor layer and the gate electrode formed around the columnar semiconductor layer may easily occur.